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FAN3223
FAN3224
FAN3225
Figure 4. Pin Assignments (Repeated)
Pin Definitions
Name
ENA
ENB
GND
INA
INA+
INA-
INB
INB+
INB-
OUTA
OUTB
OUTA
OUTB
P1
VDD
Pin Description
Enable Input for Channel A . Pull pin LOW to inhibit driver A. ENA has TTL thresholds for both TTL and
CMOS INx threshold.
Enable Input for Channel B . Pull pin LOW to inhibit driver B. ENB has TTL thresholds for both TTL and
CMOS INx threshold.
Ground . Common ground reference for input and output circuits.
Input to Channel A .
Non-Inverting Input to Channel A . Connect to VDD to enable output.
Inverting Input to Channel A . Connect to GND to enable output.
Input to Channel B .
Non-Inverting Input to Channel B . Connect to VDD to enable output.
Inverting Input to Channel B . Connect to GND to enable output.
Gate Drive Output A : Held LOW unless required input(s) are present and V DD is above UVLO threshold.
Gate Drive Output B : Held LOW unless required input(s) are present and V DD is above UVLO threshold.
Gate Drive Output A (inverted from the input): Held LOW unless required input is present and V DD is
above UVLO threshold.
Gate Drive Output B (inverted from the input): Held LOW unless required input is present and V DD is
above UVLO threshold.
Thermal Pad (MLP only). Exposed metal on the bottom of the package; may be left floating or connected
to GND; NOT suitable for carrying current.
Supply Voltage . Provides power to the IC.
Output Logic
FAN3223 (x=A or B)
FAN3224 (x=A or B)
FAN3225 (x=A or B)
1
0
1
1
1
1
1
ENx
0
0
1 (8)
(8)
INx
0
(8)
0
(8)
OUTx
0
0
1
0
ENx
0
0
1 (8)
(8)
INx
0 (8)
1
0 (8)
1
OUTx
0
0
0
1
INx+
0 (8)
(8)
1
1
INx ?
0
(8)
0
(8)
OUTx
0
0
1
0
Note:
8. Default input signal if no external connection is made.
? 2007 Fairchild Semiconductor Corporation
FAN3223 / FAN3224 / FAN3225 ? Rev. 1.1.4
4
www.fairchildsemi.com
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